A random shifting data weighted averaging algorithm for Nyquist -rate DAC

This paper proposes a random shifting data weighted averaging (RSDWA) algorithm where bidirectional circular shift register is co-worked with pseudo-random sequencer to form module, which makes mismatch error suppressed in the frequency domain, therefore it can achieve higher Spurious Free Dynamic Range (SFDR) compared traditional DWA. To verify proposed algorithm, 6-bit Nyquist-rate resistor ladder DAC designed based on 180nm CMOS process. The simulation results show that RSDWA increase SFDR by 7.3dBc and decrease Integral Non-Linearity (INL) from 0.75LSB 0.37LSB DWA algorithm.